one technology way, p.o. box 9106, norwood. ma 02062-9106, u.s.a. tel: 617/329-4700 fax: 617/326-8703 functional block diagram rev. a information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of analog devices. a general purpose input isolation amplifier ad102/ad104 features integral isolated power supply 500 v rms cmv isolation rating (100% tested) high accuracy: 6 0.05% max nonlinearity small sip style footprint lowest priced isolation amplifiers applications single/multichannel data acquisition systems process control input signal isolation motor control utility power monitoring general input protection circuits ground loop interruption general description the ad102 and ad104 are general purpose, two-port, isolation amplifiers suitable for use where input signal isolation is desired. each offers a functionally complete, compact isolation solution rated at 500 v rms common mode, based upon the proven and reliable transformer-coupled, galvanic isolation technique used in all ad200 series isolation amplifier products. each model is offered in a minimum footprint package requiring no external components to operate. though similar to the ad202 and ad204, the ad102 and ad104 models are in- tended as lower cost solutions where the performance of the ad202 or ad204 is not demanded. both the ad102 and ad104 can be used in applications where input-to-input and/or input-to-system isolation is desired. the ad102 is best suited for single input uses as it requires only +15 v dc power to operate. it may also be appropriate for multichannel applications when input-to-input isolation is not required such as where a single input multiplexer selects a spe- cific channel prior to isolation. for applications where input to input isolation is required, the ad104 may be a more desirable choice. it offers the lowest cost per channel especially when powered from a common clock source, the cost of which may be amortized over many channels. the c lock necessary for a d104 operation is a 25 khz, 15 v p-p square wave applied to the clock input pin. most standard oscil- lator components like a cd4047 or tl555 may be used, or a designer may choose the ad246 clock driver developed for the ad204 product. product highlights complete, single device solution for input isolation the ad102 offers full isolation without external parts or need for an external dc/dc power source. the ad104 features the same functionality at a lower price for multichannel uses when supplied with a 25 khz clock signal. high accuracy a maximum nonlinearity of 0.05% is specified for both the ad102 and ad104 over the rated temperature range. wide bandwidth each is specified with a full power (C3 db) bandwidth. the ad104 at 4 khz and the ad102 at 1.5 khz. high performance common-mode rejection while providing continuous 500 v rms isolation, greater than 100 db rejection is provided. each part has only 5.5 pf (typical) of common-mode input capacitance. uncommitted input stage both models offer an uncommitted op amp input stage for user flexibility and input gain optimization up to 100 v/v. low power consumption the ad104 consumes only 35 mw from the clock source, the ad102 only 75 mw from the +15 v dc supply. 5v fs signal icom pwr/clk com 25khz power demod amplifier and modulator power rectifier oscillator filter ad102 out h i out lo +15v dc in+ in fb 3 6 5 4 9 1 7 2
parameter min typ max unit notes accuracy gain range 1 100 v/v unity gain error 0.5 5.0 % vs. temperature 45 ppm/ c 100 ppm/ c max vs. time 50 ppm per ? 1,000 hours vs. supply voltage, ad102 1 0.01 %/v vs. supply voltage, ad104 1 0.001 %/v nonlinearity 2 0.05 % input voltage ratings linear differential range 5.0 v between in+ and inC cmv, input to output 2 ac, 60 hz, sinusoidal waveform 500 v rms 100% tested dc 700 v pk-pk common-mode rejection (cmr) r s 100 w , ad102 1 100 db r s 100 w , ad104 1 105 db r s 1 k w , ad102 1 95 db r s 1 k w , ad104 1 105 db leakage current 0.5 m a2 m a max, in to out, 240 v rms @ 60 hz input characteristics input offset voltage, initial ( 15 15/g) mv +25 c vs. temperature ( 10 10/g) m v/ c0 c to +70 c input bias current, initial 100 pa +25 c vs. temperature 20 na 0 c to +70 c input difference current, initial 10 pa +25 c vs. temperature 2na0 c to +70 c input voltage noise 0.1 hz to 100 hz 4 m v pk-pk f > 200 hz 50 nv/ ? hz differential input impedance 10 12 w common-mode input impedance 2g i 5.5 w i pf frequency response bandwidth, full power (C3 db) ad102 1 1.5 khz v in 5 v, g = 1C50 v/v ad104 1 4.0 khz v in 5 v, g = 1C50 v/v settling time 1.0 ms time to 10 mv from 10 v step input rated output output voltage range between out hi and out lo 5.0 v between out hi or lo to pwr/clk com 6.5 v output resistance ad102 1 8k w ad104 1 4k w output ripple 100 khz bandwidth 10 mv pk-pk 5 khz bandwidth 0.5 mv rms power supply (ad102 only) 1 supply voltage rated performance +14.25 +15 +15.75 v dc operational performance +13.5 +15 +16.5 v dc supply current 5 ma ad102/ad104Cspecifications rev. a C2C (@ t a = +25 8 c and power supply of +15 v 6 5% unless otherwise noted)
parameter min typ max unit notes clock oscillator (ad104 only) 1 source voltage amplitude 14.25 15 15.75 v pk-pk 7.5 v amplitude within 15 v range square wave frequency 25 khz 5 khz duty cycle 50 % hi vs. low 2% temperature range rated performance 0 +70 c operating C40 +85 c storage C40 +85 c package dimensions sip style package (y) 2.08 0.260 0.625 in. (max) not including pin length notes 1 specification(s) apply to one model only, either ad102 or ad104, as indicated. 2 nonlinearity is specified as a % deviation from a best fit straight line. 3 all units 100% tested by partial discharge method @ 750 v rms for 5 sec, 150 pc maximum allowable discharge. specifications subject to change without notice. pin designations pin function 1 out hi 2 pwr/clk com 3fb 4 icom 5 in+ 6 inC 7 +15 v dc (ad102) 8 clock input (ad104) 9 out lo ordering guide model package max cmv nonlinearity AD102JY sip style 500 v rms 0.05% ad104jy sip style 500 v rms 0.05% differences between the ad102 and ad104 the primary difference between the ad102 and ad104 is that the ad102 contains an integral clock oscillator circuit and the ad104 does not. as a result, the ad102 operates when sup- plied +15 v dc power while the ad104 requires power in the form of 15 v, 25 khz square wave source. typically a clock source for an ad104 will drive multiple devices to reduce the per channel cost of the source and to provide perfect oscillator synchronization between devices. the ad104 also consumes slightly less power and has more than twice the bandwidth of the ad102. in situations where only one or a few isolators are used, the con- venience of stand-alone operation offered by the ad102 may provide a greater user advantage than use of the ad104. for maximum product flexibility both the ad102 and ad104 can be accommodated by using a single universal layout for device interchangeability. rev. a C3C warning! esd sensitive device caution esd (electrostatic discharge) sensitive device. electrostatic charges as high as 4000 v readily accumulate on the human body and test equipment and can discharge without detection. although these devices feature proprietary esd protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. therefore, proper esd precautions are recommended to avoid performance degradation or loss of functionality. ad102/ad104
rev. a C4C ad102/ad104 inside the ad102 and ad104 the ad102 and ad104 use an amplitude modulation tech- nique to exploit transmission of low frequency signal levels through an isolation barrier produced by a signal transformer including signals at a dc level (figures 1 and 2). additionally a separate transformer is incorporated to provide power to the isolated input port of the device. it is driven by a 25 khz, 15 v amplitude square wave generated internally by the ad102, sup- plied externally for the ad104. the device outputs are not buffered so the user may inter- change output leads for signal inversion. in multichannel appli- cations the outputs can be multiplexed with a single buffer following the multiplexer to minimize offset errors while reduc- ing power consumption and cost. 5v fs signal icom pwr/clk com 25khz power demod amplifier and modulator power rectifier oscillator filter ad102 out h i out lo +15v dc in+ in fb 3 6 5 4 9 1 7 2 figure 1. ad102 functional block diagram 5v fs signal icom pwr/clk com 25khz power demod amplifier and modulator power rectifier filter ad104 out h i out lo clk in in+ in fb 3 6 5 4 9 1 8 2 figure 2. ad104 functional block diagram using the ad102 and ad104 powering the ad102 the ad102 requires only a single +15 v dc power supply con- nected as shown in figure 3 to operate. a series 1.3 k w resistor and 1.0 m f capacitor are connected across the +15 v dc and common pins to aid in filtering power line variations. 1.0? ad102 1.3k pwr/clk com +15vdc 7 2 figure 3. ad102 power input powering the ad104 the ad104 requires its power in the form of a 15 v p-p, 25 khz square wave from an external source as shown in fig- ure 4 (note: pinout for ad246 clock driver shown). 2 8 ad104 ad104 2 8 2 8 ad104 15v p-p @ 25khz 2 13 12 +15vdc pwr/clk com ad246 clock driver 1 figure 4. typical multiple ad104 connection ad104 clock source the ad246 clock driver designed to power the ad204 is a clock driver that can be used to supply the required clock for the ad104 from a +15 v dc supply (refer to the ad202/ad204 data sheet for ad246 specifications). for designs where the lowest cost per channel approach is de- sired, it is usually more cost efficient for designers to consider a discrete onboard clock source such as the circuit shown in figure 5 (essentially an ad246). 180pf 12 9 8 7 4 1 3 2 10 2 4 7 5 6 3 teledyne tsc426 1n914 1n914 1? 35v +15v clk out clk/pwr com 14 6 5 49.9k c rc q r cd4047b figure 5. typical clock driver circuit
ad102/ad104 rev. a C5C although this circuit generates a unipolar clock output of 0 vC15 v, any 15 v amplitude square wave at 25 khz with a duty cycle of 50% is acceptable. this is possible since the ad104 clock input is ac coupled by means of a 0.1 m f capacitor as shown in figure 6. the source, therefore, only needs to be 7.5 v p-p in total amplitude and may be offset as desired. a recommended maximum amplitude limit of 15 v with respect to pwr/clk com should not be exceeded. ad104 pwr/clk com clk in t r a n s f o r m e r 0.1? 0.1? +v ? 0.1? 2 8 figure 6. ad104 clock input one clock circuit will usually drive multiple ad104s (typically 4, 8 or 16 units). if many ad104s are to be operated from a single source, external bypass capacitors should be used with a value of at least 1 m f for every five isolators used. place the capacitor as close as possible to the clock driver. input configuration the ad102 and ad104 are very easy to use in a wide range of applications. the input stage connections (in+, inC, fb, icom) approximate a vanilla type op amp input and may for all intents and purposes be treated as such. most any typical cir- cuit connection that is valid for a standard op amp can be accommodated, so long as it is expected to perform within the specifications herein (i.e., limited gain and bandwidth parameters). figure 7 shows the most common input configuration, which is unity gain operation. this configuration is appropriate where the input signal is within the range of 5 v or where larger sig- nals have been previously attenuated, usually by means of a tra- ditional resistor divider technique. isolation barrier icom ad102 or ad104 out hi out lo clock in in+ in fb 3 6 5 4 9 1 8 2k w ( see text) v sig ( 5v) amplifier and modulator v out ( 5v) 7 2 common 15vdc (ad102) or clock (ad104) 15vdc figure 7. unity gain application for gains larger than unity, the addition of a gain and feedback resistor allows amplification of smaller signals up to a higher level. whenever practical, any low level signal should be ampli- fied to meet a full 5 v output swing. this helps reduce the effective output ripple contribution introduced to the original signal during modulation, isolation and subsequent filtering as seen at the output. isolation barrier icom ad102 or ad104 out hi out lo in+ in fb 3 6 5 4 9 1 2k w v sig ( 5v) amplifier and modulator v out ( 5v) r g r f 100pf v out = v sig x ( 1 + ) r g r f r f 3 20k w figure 8. input connection for gain > 1 when taking a gain of more than 5 v/v, addition of a 100 pf capacitor is recommended; it is not needed at lower gains, but if used will not adversely affect operation. additionally, whenever the isolation amplifier is not powered, a negative input voltage of approximately 2 v may cause an input current to flow. if the signal source can supply more than a few ma of current, a 2 k w limiting resistor in series with in+ is recommended. this is es- pecially advised when using ad102s as they may not power up properly with a high input current present, (see figures 7 and 8 for examples). synchronization since the ad104 operates from a common clock, synchroniza- tion is inherent. ad102s will normally not interact to produce beat frequencies even when mounted on 0.3 inch centers. inter- action may occur in very rare situations where a large number of long, unshielded input cables are bundled together. in such cases, shielded cable may be required or ad104s can be used. for related information and application examples refer to the ad202/ad204 and ad210 data sheets.
rev. a C6C ad102/ad104 outline dimensions dimensions shown in inches and (mm). 1 2 98 7 3 4 65 0.10 (2.54) 0.20 (5.08) 0.05 (1.27) bottom view 1.50 (38.10) 0.120 (3.048) 0.143 (3.63) ad102/ad104 front view 2.08 (52.83) max 0.15 (3.81) typ 0.010 x 0.020 (0.254 x 0.508) 0.250 (6.35) typ 0.260 (6.60) max 0.625 (15.88) max 0.10 (2.54) side view note: pin 7 is only present on ad102 pin 8 is only present on ad104 printed in u.s.a. c1954C10C10/94
|
